Candidates will be involved in the architecture definition of High Speed interface circuits (up to 28 Gbit/sec)
- Component selection
- Design For Testability analysis and production issues
- Design of electrical diagram
- Layout constraint definition
- Laboratory prototype testing (using oscilloscopes, network analyzers, thermal chambers, etc…)
Keywords: High Speed Circuits, Testing, Design for Testability
Company: Ericsson, Genoa site.