(PhD in Electronic Engineering)
• UVM Concepts and Architecture
• UVM Sequences and Phasing
• UVM TLM2 and Register Package
• Putting Together UVM Testbenches
• Introduction to the production test for ASIC Design for Testability
• Automatic Test Equipment and Test Program
• Silicon defects and the Stuck at defect models
• Algorithm for detecting faults
• Scan Chain Inside the Automatic Test Equipment
• Boundary scan
• Advanced DFT issues
• Other defect models
• RAM fault models
• Conclusions